There is known a solid-state imaging device including a plurality of pixel sections each including a photodiode which generates charges corresponding to the intensity of incident light, and a signal processing circuit which outputs voltages corresponding to the amount of charges successively output to a common wire from the plurality of pixel sections. The solid-state imaging device including the plurality of pixel sections one-dimensionally aligned can handle a larger charge quantity that a CCD cannot handle, and the length in the alignment direction of the plurality of pixel sections can be increased to, for example, 500 μm to 2 mm, and therefore, the solid-state imaging device is used as a one-dimensional image sensor in spectrometers, displacement meters, and barcode readers, etc.
In the solid-state imaging device thus configured, the common wire connecting the plurality of pixel sections and the signal processing circuit to each other is long, so that the capacity of the common wire is high. The junction capacitances of the photodiodes included in the plurality of pixel sections, respectively, are also high. Therefore, in this solid-state imaging device, it is difficult to increase the imaging speed. On the other hand, there is known a solid-state imaging device having an increased imaging speed (refer to, for example, Non-Patent Document 1).
In the solid-state imaging device described in Non-Patent Document 1, the plurality of pixel sections include, respectively, photoelectric converting circuits which include photodiodes for generating charges corresponding to the intensity of incident light and output voltages corresponding to the amount of the generated charges, and holding circuits which hold the voltages output from the photoelectric converting circuits and successively output the amount of charges corresponding to the held voltages to the common wire. With this configuration, junction capacitances of the photodiodes included in the plurality of pixel sections, respectively, can be made smaller as viewed from the signal processing circuit, and the imaging speed can be increased.    Non-Patent Document 1: K. Hara, et al., “A Linear Logarithmic CMOS Sensor with Offset Calibration Using an Injected Charge Signal,” ISSCC 2005 Dig. Tech. Papers, pp. 354-355 (2005)